Part Number Hot Search : 
2SD2143 0M000000 05091 OM5212SC FN3318 24AA0 C1820CA BAQ3312
Product Description
Full Text Search
 

To Download PS4066CEE Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  1 ps8184a 10/15/98 features ? low on-resistance ? on-resistance matching between channels, 0.2 w typ ? on-resistance flatness, <2 w typ ? low off-channel leakage, <100pa @ +25 o c ? ttl/cmos logic compatible ? gnd-to-v+ analog signal dynamic range ? low power consumption (<12 m w) ? low crosstalk: -86db @ 1mhz ? low off-isolation: -58db @ 1 mhz ? wide bandwidth: > 100 mhz ? small qsop-16 package saves board area applications ? instrumentation, ate ? sample-and-holds ? audio switching and routing ? telecommunication systems ? pbx, pabx ? battery-powered systems n.c. = no internal connection switches shown for logic 0 input description the ps4066/ps4066a are improved spst cmos analog switches ideal for low-distortion audio switching. these high pre- cision, medium voltage switches were designed to operate with single-supplies from +3v to 16v. they are fully specified with +12v, +5v, and +3v supplies. the ps4066/ps4066a has four normally open (no) switches. each switch conducts current equally well in either direction when on. in the off state each switch blocks voltages up to the power-supply rails. with +12v power supply, the ps4066/ps4066a guarantee <45 w on-resistance. on-resistance matching between channels is within 2 w (ps4066). on-resistance flatness is less than 4 w (ps4066a) over the specified range. the ps4066a guarantees low leakage currents (<100pa @ 25 o c, <6na @ +85 o c) and fast switching speeds (t on < 175ns). esd sensitivity rating is >2,000v per mil-std 883, method 3015.7 both devices are available in pdip-14, narrow-body soic-14, and qsop-16 packages. available temperature ranges are: com- mercial (0 o c to 70 o c), and industrial (-40 o c to +85 o c). for operation below 5v, the pi5a101/pi5a391/pi5a392 are also recommended. top view functional diagrams, pin configurations, and truth table c i g o lh c t i w s 0 1 f f o n o top view qsop pdip/so ps4066/ps4066a low-cost, quad, spst, cmos analog switches 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012
1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 2 ps8184a 10/15/98 ps4066/ps4066a low-cost, quad, spst, cmos analog switches absolute maximum ratings caution : stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress onl y rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. electrical specifications - single +12v supply (v+ = 12v 10%, gnd = 0v, v inh = 4v, v inl = 0.8v) r e t e m a r a pl o b m y s s n o i t i d n o c ) c ( . p m e tn i m (1) p y t (2) x a m (1) s t i n u h c t i w s g o l a n a l a n g i s g o l a n a e g n a r ) 3 ( v g o l a n a l l u f0 + v v e c n a t s i s e r n o r n o i , v 2 1 = + v m o c , a m 2 = v o n v 0 1 = 5 22 15 4 w l l u f5 5 h c t a m e c n a t s i s e r - n o s l e n n a h c n e e w t e b ) 4 ( d r n o i , v 2 1 = + v m o c a m 2 = v o n v 0 1 = 6 6 0 4 s p a 6 6 0 4 s p 5 2 5 . 0 5 . 0 4 2 l l u f6 e c n a t s i s e r - n o s s e n t a l f ) 5 ( r ) n o ( t a l f i , v 2 1 = + v m o c , a m 2 = v o n v 1 , v 5 , v 0 1 = 5 224 l l u f6 f f o c n r o o n t n e r r u c e g a k a e l ) 6 ( i ) f f o ( o n or i ) f f o ( c n v , v 2 1 = + v m o c , v 0 = v o n v 0 1 = 6 6 0 4 s p a 6 6 0 4 s p 5 2 1 - 1 . 0 - 1 1 . 0 a n l l u f6 -6 e g a k a e l f f o m o c t n e r r u c ) 6 ( i ) f f o ( m o c v , v 2 1 = + v m o c , v 0 = v o n v 0 1 = 6 6 0 4 s p a 6 6 0 4 s p 5 2 1 - 1 . 0 - 1 1 . 0 l l u f6 -6 e g a k a e l n o m o c t n e r r u c ) 6 ( i ) n o ( m o c v , v 2 1 = + v m o c , v 0 1 = v o n v 0 1 = 6 6 0 4 s p a 6 6 0 4 s p 5 2 2 - 2 . 0 - 2 2 . 0 l l u f2 1 -2 1 thermal information continuous power dissipation (t a = +70 o c) plastic dip (derate 10.5mw/ o c above +70 o c) . . . . . . 800mw so and qsop (derate 8.7mw/ o c above +70 o c) . . . . . 650mw storage temperature . . . . . . . . . . . . . . . . . . . -65 o c to +150 o c lead temperature (soldering, 10s) . . . . . . . . . . . . . . . +300 o c note signals on nc, no, com, or in exceeding v+ or gnd are clamped by internal diodes. limit forward diode current to 30ma. voltages referenced to gnd v+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to +17v v in , v com , v nc , v no (note 1) . . . . . . . . -2v to (v+) +2v or 30ma, whichever occurs first current (any terminal) . . . . . . . . . . . . . . . . . . . . . . . . . 30ma peak current, com, no, nc (pulsed at 1ms, 10% duty cycle) . . . . . . . . . . . . . . . . 100ma esd per method 3015.7 . . . . . . . . . . . . . . . . . . . . . . >2000v
3 ps8184a 10/15/98 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 ps4066/ps4066a low-cost, quad, spst, cmos analog switches r e t e m a r a pl o b m y ss n o i t i d n o c) c ( p m e tn i m ) 1 ( p y t ) 2 ( x a m ) 1 ( s t i n u t u p n i c i g o l h t i w t n e r r u c t u p n i h g i h e g a t l o v t u p n i i h n i v 8 . 0 = s r e h t o l l a , v 5 = n i l l u f 5 . 0 -5 0 0 . 05 . 0 m a h t i w t n e r r u c t u p n i w o l e g a t l o v t u p n i i l n i v 5 = s r e h t o l l a , v 8 . 0 = n i5 . 0 -5 0 0 . 05 . 0 c i m a n y d e m i t n o - n r u tt n o v m o c 2 e r u g i f , v 0 1 = 5 25 40 0 1 s n l l u f0 5 1 e m i t f f o - n r u tt f f o 5 27 15 7 l l u f0 0 1 l e n n a h c - n o h t d i w d n a b w b m b d 0 = l a n g i s 0 5 , 4 e r u g i f w t u o d n a n i 5 2 0 0 1z h m n o i t c e j n i e g r a h c ) 3 ( q c l , f n 1 =v n e g r , v 0 = n e g 0 = w , 3 e r u g i f 20 1c p n o i t a l o s i f f or r i or l 0 5 = w c , l 4 e r u g i f , z h m 1 = f , f p 5 =8 5 - b d k l a t s s o r c ) 8 ( x k l a t r l 0 5 = w c , l 5 e r u g i f , z h m 1 = f , f p 5 =6 8 - e c n a t i c a p a c o nc ) f f o ( 6 e r u g i f , z h m 1 = f9 f p f f o m o c e c n a t i c a p a c 6 e r u g i f , z h m 1 = f9 n o m o c e c n a t i c a p a c c ) n o ( m o c 7 e r u g i f , z h m 1 = f2 2 y l p p u s y l p p u s e v i t i s o p t n e r r u c + i v n i , + v r o v 0 = f f o r o n o s l e n n a h c l l a l l u f 1 -1 0 0 . 01 m a c i n o m r a h l a t o t n o i t r o t s i d d h t 3 0 . 0% electrical specifications - single +12v supply (continued) (v+ = 12v 10%, gnd = 0v, v inh = 4v, v inl = 0.8v) notes: 1. the algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet. 2. typical values are for design aid only, not guaranteed or subject to production testing. 3. guaranteed by design 4. d r on = d r on max - d r on min 5. flatness is defined as the difference between the maximum and minimum value of on-resistance measured. 6. leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25oc. 7. off isolation = 20log 10 [ v com / (v no or v no ) ], v com = 0utput, v nc /v no = input to off switch 8. between any two switches.
1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 4 ps8184a 10/15/98 ps4066/ps4066a low-cost, quad, spst, cmos analog switches electrical specifications - single +5v supply (v+ = +5v 10%, gnd = 0v, v inh = 2.4v, v inl = 0.8v) r e t e m a r a pl o b m y ss n o i t i d n o c) c ( p m e tn i m ) 1 ( p y t ) 2 ( x a m ) 1 ( s t i n u h c t i w s g o l a n a e g n a r l a n g i s g o l a n a ) 3 ( v g o l a n a l l u f0 + vv e c n a t s i s e r - n or n o i , v 5 . 4 = + v m o c , a m 1 - = v o n v 5 . 3 = 5 22 25 7 w l l u f0 0 1 e c n a t s i s e r - n o s l e n n a h c n e e w t e b h c t a m ) 4 ( d r n o i , v 5 = + v m o c , a m 1 - = v o n v 3 = 5 23 . 04 l l u f2 1 s s e n t a l f e c n a t s i s e r - n o ) 5 , 3 ( r ) n o ( t a l f i , v 5 = + v m o c , a m 1 - = v o n v 3 , v 1 = 5 246 l l u f8 e g a k a e l f f o o n t n e r r u c ) 9 ( i ) f f o ( o n v , v 5 . 5 = + v m o c , v 0 = v o n v 5 . 4 = 6 6 0 4 s p a 6 6 0 4 s p 5 2 1 - 1 . 0 - 1 1 . 0 a n l l u f6 -6 e g a k a e l f f o m o c n e r r u c ) 9 ( i ) f f o ( m o c v , v 5 . 5 = + v m o c , v 0 = v o n v 5 . 4 = 6 6 0 4 s p a 6 6 0 4 s p 5 2 1 - 1 . 0 - 1 1 . 0 l l u f6 -6 e g a k a e l n o m o c t n e r r u c ) 6 ( i ) n o ( m o c v , v 5 . 5 = + v m o c v 5 = v o n v 5 . 4 = 6 6 0 4 s p a 6 6 0 4 s p 5 2 2 - 2 . 0 - 2 2 . 0 l l u f2 1 -2 1 c i m a n y d e m i t n o - n r u tt n o v o n v 3 = 5 25 65 2 1 s n l l u f5 7 1 e m i t f f o - n r u tt f f o 5 20 35 7 l l u f5 2 1 h t d i w d n a b l e n n a h c - n ow b 0 5 , m b d 0 = l a n g i s w t u o d n a n i 4 e r u g i f 5 20 0 1mhz n o i t c e j n i e g r a h c ) 3 ( q c l v , f n 1 = n e g , v 0 = r n e g = 3 e r u g i f , v 0 5 210 1c p y l p p u s t n e r r u c y l p p u s e v i t i s o p+ i v , v 5 . 5 = + v n i , + v r o v 0 = f f o r o n o s l e n n a h c l l a l l u f1 -1 m a
5 ps8184a 10/15/98 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 ps4066/ps4066a low-cost, quad, spst, cmos analog switches electrical specifications - single +3v supply (v+ = +2.7v to 3.3v, gnd = 0v, v i nh = 2.4v, v inl = 0.8v) r e t e m a r a pl o b m y ss n o i t i d n o cc p m e t. n i m ) 1 ( p y t ) 2 ( . x a m ) 1 ( s t i n u h c t i w s g o l a n a e g n a r l a n g i s g o l a n a ) 3 ( v g o l a n a 0+ vv e c n a t s i s e r - n o l e n n a h cr n o i , v 3 = + v m o c , a m 1 - = v o n v 5 . 1 = 5 20 7 1 w l l u f5 2 2 c i m a n y d e m i t - n o - n r u t ) 3 ( t n o v , v 3 = + v o n v 5 . 1 = 5 20 85 8 1 s n l l u f0 3 2 e m i t - f f o - n r u t ) 3 ( t ) f f o ( v , v 3 = + v o n v 5 . 1 = 5 20 40 5 1 l l u f0 0 2 n o i t c e j n i e g r a h c ) 3 ( q c l v , f n 1 = n e g , v 0 = r n e g v 0 = 5 220 1c p y l p p u s t n e r r u c y l p p u s e v i t i s o p+ i v , v 3 . 3 = + v n i , + v r o v 0 = f f o r o n o s l e n n a h c l l a l l u f1 -1 0 0 . 01 m a notes: 1. the algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet. 2. typical values are for design aid only, not guaranteed or subject to production testing. 3. guaranteed by design 4. d r on = d r on max - d r on min 5. flatness is defined as the difference between the maximum and minimum value of on-resistance measured. 6. leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25oc. 7. off isolation = 20log 10 [ v com / (v no or v no ) ], v com = 0utput, v nc /v no = input to off switch 8. between any two switches.
1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 6 ps8184a 10/15/98 ps4066/ps4066a low-cost, quad, spst, cmos analog switches typical operating characteristics (ta = +25c, unless otherwise noted) r on vs. v com & temperature r on vs. v com & supply voltages charge injection vs. analog voltage leakage currents vs. v com
7 ps8184a 10/15/98 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 ps4066/ps4066a low-cost, quad, spst, cmos analog switches typical operating characteristics (ta = +25c, unless otherwise noted) leakage current input switching threshold vs. supply voltage v + (v) temperature (c) v in (v) leakage current vs. temperature i+ (ma) supply current vs. v in v + (v) t on, t off (ns) v in (v) starting times (ns) temperature (c) switching current vs. switching frequency switching times vs. temperature supply currents vs. switching frequency i + (ma) frequency (mhz)
1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 8 ps8184a 10/15/98 ps4066/ps4066a low-cost, quad, spst, cmos analog switches proper power-supply sequencing is recommended for all cmos devices. do not exceed the absolute maximum ratings, because stresses beyond the listed ratings may cause permanent damage to the devices. always sequence v+ on first, and then the logic inputs. if power-supply sequencing is not possible, add a small signal diode or current limiting resistor in series with the supply pin for overvoltage protection (figure 1). adding a diode reduces the analog signal range, but low switch resistance and low leakage characteristics are unaffected. applications information figure 1. overvoltage protection is accomplished using an exter- nal blocking diode or a current limiting resistor . pin description overvoltage protection test circuits/timing diagrams figure 3. charge injection figure 2. switching times
9 ps8184a 10/15/98 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 ps4066/ps4066a low-cost, quad, spst, cmos analog switches test circuits/timing diagrams (continued) figure 4. off isolation, bw figure 6. channel-off capacitance figure 5. crosstalk figure 7. channel-on capacitance ordering information r e b m u n t r a pe g n a r - e r u t a r e p m e te g a k c a p d p c 6 6 0 4 s pc o 0 7 + o t c o 0p i d c i t s a l p 4 1 d s c 6 6 0 4 s pc o 0 7 + o t c o 0o s w o r r a n 4 1 6 6 0 4 s pe e cc o 0 7 + o t c o 0p o s q 6 1 6 0 4 s p6d p ec o 5 8 + o t c o 0 4 -p i d c i t s a l p 4 1 d s e 6 6 0 4 s pc o 5 8 + o t c o 0 4 -o s w o r r a n 4 1 d p c a 6 6 0 4 s pc o 0 7 + o t c o 0p i d c i t s a l p 4 1 d s c a 6 6 0 4 s pc o 0 7 + o t c o 0o s w o r r a n 4 1 e e c a 6 6 0 4 s pc o 0 7 + o t c o 0p o s q 6 1 d p e a 6 6 0 4 s pc o 5 8 + o t c o 0 4 -p i d c i t s a l p 4 1 d s e a 6 6 0 4 s pc o 5 8 + o t c o 0 4 -o s w o r r a n 4 1 e e e a 6 6 0 4 s pc o 5 8 + o t c o 0 4 -p o s q 6 1 pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com v+ +12v capacitance meter gnd no com 10nf in 0v f = 1khz


▲Up To Search▲   

 
Price & Availability of PS4066CEE

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X